ATMEL 89C55 PDF

NXP Flash MCU to Atmel Flash MCU Cross Reference. 07/01/ 86KB. NXP Flash MCU to Atmel Flash MCU Devices, Non-Direct Replacements. 07/01/ The device is manufactured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard 80C51 instruction set and. 89C55 datasheet, 89C55 circuit, 89C55 data sheet: ATMEL – 8-Bit Microcontroller with 20K Bytes Flash,alldatasheet, datasheet, Datasheet search site for.

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Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. Interrupt Registers The individual interrupt enable bits are in the IE register. Attmel inputs, Port 3 pins that are externally being pulled low will source current I.

Otherwise, the pin is weakly pulled high. As inputs, Port 1 pins that are externally being pulled low will source current I. Port 3 also receives the highest-order address bit and some control signals for Flash programming and verifica- tion. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. Port 1 also receives the low-order address bytes during Flash programming and verification. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 whose address is 0A0H.

INT1 external interrupt 1. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C55 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.

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Atmel AT89C55

Note that stack operations are examples of indirect addressing, so the upper bytes of data RAM are avail- able as stack space. In that case, the reset or inactive values of the new bits will always be 0. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs.

As an output port, each pin can sink eight TTL inputs. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use bit addresses MOVX DPTR. This pin also receives the volt programming enable volt- age V. Two priorities can be set for each of the six interrupt sources in the IP register. The device is manu- factured using Atmel’s high density nonvolatile memory technology and is compatible with the industry standard 80C51 instruction set and pinout.

When 1s are written to port 0 pins, the pins can be used as high- impedance inputs.

Instructions that use direct addressing access SFR space. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. User atmrl should not write 1s to these unlisted loca- tions, since they may be used 89cc55 future products to invoke new features. Search field Part name Part description. XTAL2 Output from the inverting oscillator amplifier. Port 3 also serves the functions of various special features of the AT89C55, as shown in the following table.

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89C55 Datasheet pdf – 8-Bit Microcontroller with 20K Bytes Flash – Atmel

Instructions that use indirect addressing access the upper bytes of RAM. Setting the ALE-disable bit has no effect if atel microcontroller is in external execution mode. INT0 external interrupt 0.

TXD serial output port. Note, however, that one ALE pulse is skipped during each access to external data mem- ory. The low-voltage option saves power and operates with a 2. Port 0 also receives the code bytes during Flash program- ming and outputs the code bytes during program verifica- tion. External pullups are required during program verifica- tion.

When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. EA should be strapped to V.

Note that not all of the addresses are occupied, and unoc- cupied addresses may not be implemented on the chip. RXD serial input port.

RD external data memory read strobe. T0 timer 0 external input. In this mode, P0 has internal pul- lups.

In addition, the AT89C55 is designed with static logic for operation down to zero frequency and sup- ports two software selectable power saving modes. The Power Down Mode saves the RAM con- tents but freezes the oscillator, disabling all other chip func- tions until the next hardware reset.