Intel Programmable Key Board/Display Interface is available in the The description of pins of Programmable keyboard/display interface is given. The INTEL is specially developed for interfacing keyboard and display devices Programmable scan timing. Block diagram of The four major sections of are keyboard, scan, display and CPU interface. Keyboard section. The INTEL is a Keyboard/Display Controller specially developed for interfacing keyboard Programmable scan timing. Keyboard section: The CPU interface section takes care of data transfer between the and the processor.

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These are the output ports for two 16×4 or one 16×8 internal display refresh registers.

The timing and control unit handles the timings for the operation of the circuit. When it is low, it indicates the transfer of data. These are the scan lines used to scan the keyboard matrix and display the digits.

Its data buffer interfaces the external bus of the system with the internal bus of the microprocessor. Generates a basic timer interrupt that occurs at approximately Chip select that enables programming, reading the keyboard, etc. BB works similarly except that they blank turn off half of the output pins.

Intel – Wikipedia

This unit controls the flow of data through the microprocessor. Unlike the 82C55, the must be programmed first. In the Polled modethe CPU periodically reads an internal flag of to check whether any key is pressed or not with key pressure. The data from these lines is synchronized programmzble the scan lines to scan the display and the keyboard. SL outputs are active-low only one low at any time.


In the scanned sensor matrix mode, this unit acts as sensor RAM where its each row is loaded with the status of their corresponding row of sensors into the matrix.

Scans and encodes up keybkard a key keyboard. Provides a timing source to the internal speaker and other devices. The previous example illustrates an encoded keyboard, external decoder used to drive matrix.

DD Function 00 8-digit display with left entry 01 digit display with left entry 10 8-digit display with right entry 11 digit display with right entry. Encoded mode and Decoded mode.

Used internally for timing.

Interace lines are inputs used to sense key depression in the keyboard matrix. This unit first scans the key closure row-wise, if found then the keyboard debounce unit debounces the key entry.

Selects type of write and the address of the write. Generates a continuous square-wave with G set to 1.

The display is controlled from an internal 16×8 RAM that stores the coded display information. Encoded keyboard with 2-key lockout.


Decoded keyboard with 2-key lockout. Once done, a procedure is needed to read data from the keyboard. The first 3 bits of sent to control port selects one of 8 control words.

Encoded keyboard with N-key rollover. Selects the number of display positions, type of key scan This is when the overrun status is set. Keyboard Interface of Keyboard Interface of The keyboard matrix can be any size from 2×2 to 8×8. The keyboard consists of maximum 64 keys, which are interfaced with the CPU by using the key-codes.

Interrupts the micro at interrupt vector 8 for a clock tick. Pins SL2-SL0 sequentially scan each column through a counting operation.

8279 – Programmable Keyboard

The scans RL pins synchronously with the scan. The keyboard first scans the keyboard and identifies if programmavle key has been pressed. Z selects auto-increment for the address. RL pins incorporate internal pull-ups, no need for external resistor pull-ups. These lines are set to 0 when any key is pressed.

Keyboard Interface of MMM field: DD sets displays mode. Interface of 2 Keyboard type is programmed next.